diff --git a/ansible/roles/fluentbit/fluent-bit.conf.j2 b/ansible/roles/fluentbit/fluent-bit.conf.j2 index bc68809..83bfa71 100644 --- a/ansible/roles/fluentbit/fluent-bit.conf.j2 +++ b/ansible/roles/fluentbit/fluent-bit.conf.j2 @@ -83,17 +83,29 @@ # storage.backlog.mem_limit 5M [INPUT] - name cpu - tag cpu + Name cpu + Tag cpu # Read interval (sec) Default: 1 - interval_sec 1 + Interval_sec 1 + +[INPUT] + Name exec + Tag memory + Command free -m | tail -2 | tr '\n' ' ' + Interval_Sec 1 [OUTPUT] - name forward - match * - host maestro.dmz - port {{ fluent_forward_port }} + Name forward + Match * + Host maestro.dmz + Port {{ fluent_forward_port }} + +[FILTER] + Name parser + Match memory + Key_Name exec + Parser free [FILTER] Name record_modifier @@ -102,6 +114,6 @@ [FILTER] Name record_modifier - Match * + Match cpu Allowlist_key hostname Allowlist_key cpu_p diff --git a/ansible/roles/fluentbit/parsers.conf.j2 b/ansible/roles/fluentbit/parsers.conf.j2 new file mode 100644 index 0000000..86c51ae --- /dev/null +++ b/ansible/roles/fluentbit/parsers.conf.j2 @@ -0,0 +1,6 @@ +# vi: ft=conf +[PARSER] + Name free + Format regex + Regex ^Mem:\s+(?\d+)\s+(?\d+)\s+(?\d+)\s+(?\d+)\s+(?\d+)\s+(?\d+) Swap:\s+(?\d+)\s+(?\d+)\s+(?\d+) + Types mem_total:integer mem_used:integer mem_free:integer mem_shared:integer mem_buff_cache:integer mem_available:integer swap_total:integer swap_used:integer diff --git a/ansible/roles/fluentbit/tasks/main.yml b/ansible/roles/fluentbit/tasks/main.yml index f8d0d56..389526d 100644 --- a/ansible/roles/fluentbit/tasks/main.yml +++ b/ansible/roles/fluentbit/tasks/main.yml @@ -18,3 +18,9 @@ src: "{{ role_path }}/fluent-bit.conf.j2" dest: /etc/fluent-bit/fluent-bit.conf notify: restart fluent-bit + +- name: Copy fluent-bit parsers configuration + template: + src: "{{ role_path }}/parsers.conf.j2" + dest: /etc/fluent-bit/parsers.conf + notify: restart fluent-bit